This year, STMicroelectronics rewarded Christophe Chevallaz and Mirella Negro with its Star Awards for their major contribution in developing the IC Design verification team’s performance. Christophe and Mirella have been the groundbreakers of the ST Verification School. They have created the program and then promoted it to ST’s engineers worldwide.

What is the ST Verification School?

The ST Verification School is an internal learning and development program for IC verification engineers.

As a modular program, it enables both software and design engineers to develop their knowledge and skills in the challenging area of chip verification. It also helps existing design verification engineers to strengthen their IC verification expertise.

The Verification School was conceived as a comprehensive 1-year program. It combines classrooms, workshops and tutoring for each student. Moreover, the school is an innovative, blended approach that is much more project-oriented, adaptative, and agile than other traditional training courses.

The ST Verification School demonstrates ST’s strong commitment to offering important development opportunities to its incoming and less experienced employees. It recognizes that new graduates may have partial or academic verification knowledge. The school offers a unique opportunity to acquire proven verification skills over a short time. After the program, trainees can leverage their verification knowledge right into the development of their projects. This benefits both ST and, in the long term to the semiconductor industry globally.

The first trainees graduated from ST’s Verification School in 2020. Three classes have now been through the program and two more are already scheduled. ST constantly updates the content and teaching methods as the program’s reach extends further and further.

Recognizing our expertise in IC design verification, Christophe and Mirella selected Aedvices to create and run the program. We are very proud to be part of this successful program.

Aedvices role

Aedvices brings its huge experience in both the execution of IC verification projects and in teaching verification to engineers who are entering the field. It combines its expertise with ICONDA’s specialized teaching methods. These methods were developed for technical audiences who face particularly complex problems. IC verification is certainly complex.

IC verification requires engineers to master a wide range of technical and non-technical concepts. These include the analysis of large, heterogeneous designs, the development of strategies to verify those designs, and planning and execution of the strategies along with constant communication with the many stakeholders involved. Hence, beyond the undisputed technical expertise brought by Aedvices, the teaching method is a critical asset that makes the program so unique and successful.

For each of the yearly session, Aedvices is involved in multiple stages.

The Aedvices team proactively advizes in the construction, content, and structure of the program. As the program combines several types of teaching methods and several speakers, it needs to be clearly and carefully architected to allow everyone to know their contribution to the verification school.

Aedvices’ program gives participants a toolbox to acquire mastery in Universal Verification Methodology, which is competence in formal verification and verification methodologies. François Cerisier, in charge of training for the Verification School, is an expert in verification. He develops creative learning methods. So that each student is completely involved in the on-site courses as well as online ones.

To graduate, students demonstrate their new expertise by presenting their written work and a case study. A jury, based on teachers and tutors involved in the program, appraises how each student acquired their new skills in verification.

“Broadly, Aedvices is proud to have trained over 200 ST engineers on various design and verification topics. Among those, more than 60 people attended the verification school and are now strong contributors to ST’s project development successes,” said François Cerisier, Aedvices Founder and CEO and key expertise contributor into the verification school.

Positive feedback

The feedback of this program is highly positive!

The program is suited to both design and verification engineers. At the end of the program, we were delighted to see that all students had developed a concrete verification mindset. Depending to the modules they’d followed, the ST employees had acquired or enhanced their expertise on tools, languages, and/or advanced verification methodologies.

The Verification School is instrumental to the success of all development at ST as verification represents a critical part of IC development activity. Leveraging a verification culture across project teams also brings cohesion within the team.

The Verification School is also seen by the participants as an opportunity to boost their career or open new paths.

André, an ST system-on-chip Verification Engineer said “Thank you so much to AEDVICES & the Verification School for giving me wings to speed up in my verification skills! The program has given me theorical assets to grow now on my own and with my teammates”

ST’s Star Awards are a testimonial that the Verification School fosters dynamism and passion within ST teams. Learning new skills is a key motivation for engineers. They love new stuff and appreciate trainings which is directly applicable to their daily working life.